1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same.
2. Description of the Related Art
A phase change memory is a memory that uses a difference in resistance between materials in accordance with a phase change and is one of next generation memory semiconductors that has the advantage of a flash memory in which stored information is not erased although power is not supplied and the advantage of a dynamic random access memory (DRAM) in which stored data is erased when power is not supplied, however, processing speed is high.
The phase change memory has an access time at least 1,000 times faster than that of the flash memory that is a representative non-volatile memory and can operate at a low voltage of no more than 2 to 5 V like the DRAM.
Also, it is possible to read and write data fast in the phase change memory like in a static random access memory (SRAM). Since the phase change memory has a relatively simple cell structure, it is possible to reduce the size of a device to the size of a DRAM device.
Also, since not a memory device using storage of charges but a difference in resistance between materials in accordance with a phase change is used, it is possible to write down and erase information no less than 1010 times without being affected by cosmic radiation or electromagnetic wave.
FIG. 1 is a sectional view illustrating the structure of a conventional phase change memory.
As illustrated in FIG. 1, a phase change memory 10 includes a lower electrode 12, a contact 14, a phase change material layer 16, and an upper electrode 18.
The temperature of the phase change material layer 16 is changed by the amount of current that flows in the contact 14. In accordance with the change in temperature, the alignment of the atoms or molecules of the phase change material layer 16 is changed into an amorphous state having no regularity or a crystalline state having regularity to obtain 1 and 0 through the lower electrode 12 and the upper electrode 18. The signal is 0 when the alignment is in the crystalline state and is 1 when the alignment is in the amorphous state. Information is processed while repeating the states.
As illustrated in FIG. 1, in the conventional phase change memory 10, since the contact 14 is connected to the phase change material layer 16 only through the top surface thereof, the heat generated by the contact resistance of the contact 14 is transmitted to the phase change material layer 16 based on the top surface of the contact 14 in the radiation direction (the arrow of FIG. 1).
Therefore, a program region 15 that functions as a memory is limited to a partial region as illustrated in FIG. 1, the amount of generation of heat is determined by the area of the top of the contact, the distribution of heat is not uniform all over the phase change material layer 16, and heat transmission time is long.
When heat distribution is not uniform and it takes a long time to transmit heat like the conventional phase change memory 10, a switching time for which the phase change material layer 16 changes from an amorphous state to a crystalline state or from the crystalline state to the amorphous state increases so that the operation speed of a memory becomes low.